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TSS Tutorials @ETS

The TSS@ETS Tutorials of Monday afternoon are freely accessible to all ETS attendees with a full registration. The complete TSS program can be found here.


TSS Tutorial 1 @ETS

Title: Machine Learning Techniques for System Level Test and Diagnosis
Presenter: Krishnendu CHAKRABARTY (Duke University – USA)

Tutorial Summary: The gap between working silicon and a working board/system is becoming more significant and problematic as technology scales and complexity grows. The result of this increasing gap is failures at board and system level that cannot be duplicated at the component level. These failures are most often referred to as “No Trouble Found” (NTF). The result of these NTFs can range from higher manufacturing cost, and failure to get the product out of the door. The problem will only get worse as technology scales and will be compounded as new packaging techniques such 2.5D/3D extend and expand Moore’s law. The speaker will describe the nature of this problem and present recent advances in using machine-learning techniques to facilitate accurate and rapid board repair. In particular, the speaker will describe how techniques such as artificial neural networks, support-vector machines, decision trees, and information-theoretic analysis can be used for addressing root cause identification in boards and systems. He will present Imputation methods that allow us to carry out reasoning using incomplete data. Methods for knowledge discovery and knowledge transfer for early-stage diagnosis will also be presented. The presentation will include a number of case studies using telecom boards from high-volume manufacturing.

Biography of Krishnendu CHAKRABARTY: Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now the William H. Younger Distinguished Professor of Engineering in the Department of Electrical and Computer Engineering at Duke University. Prof. Chakrabarty is a recipient of the National Science Foundation CAREER award, the Office of Naval Research Young Investigator award, the Humboldt Research Award from the Alexander von Humboldt Foundation, Germany, the IEEE Transactions on CAD Donald O. Pederson Best Paper award (2015), and 11 best paper awards at major IEEE conferences. He is also a recipient of the IEEE Computer Society Technical Achievement Award (2015) and the Distinguished Alumnus Award from the Indian Institute of Technology, Kharagpur (2014). He is a Research Ambassador of the University of Bremen (Germany) and a Hans Fischer Senior Fellow at the Institute for Advanced Studies, Technical University of Munich, Germany. Prof. Chakrabarty current research interests include: testing of integrated circuits and systems; microfluidic biochips and cyberphysical systems; enterprise systems and smart manufacturing. He is a Fellow of ACM, a Fellow of IEEE, and a Golden Core Member of the IEEE Computer Society. He holds eight US patents, with several patents pending. Prof. Chakrabarty served as the Editor-in-Chief of IEEE Design & Test of Computers during 2010-2012 and ACM Journal on Emerging Technologies in Computing Systems during 2010-2015. Currently he serves as the Editor-in-Chief of IEEE Transactions on VLSI Systems. He is also an Associate Editor of IEEE Transactions on Computers, IEEE Transactions on Biomedical Circuits and Systems, IEEE Transactions on Multiscale Computing Systems, and ACM Transactions on Design Automation of Electronic Systems.


TSS Tutorial 2 @ETS

Title: Self-Awareness and resilience against faults, bugs and attacks
Presenter: Axel JANTSCH and Christian KRIEG (Institute of Computer Technology, Vienna University of Technology – Austria)

Tutorial Summary: The traditional paradigm of design and validation of electronic systems is to fully and precisely specify a system, and then design, implement and verify it according to this specification. This paradigm has achieved operational systems with billions of transistors, wonderfully sophisticated functionality and with amazing precision. However, with the further increase in complexity, higher demands on adaptability, resilience and autonomy, and the deployment in less predictable and changing environments, alternative paradigms of design and operation are explored. Self-awareness describes the capability of a system to monitor its own state, its performance and its integrity. Equipped with an accurate assessment of its own situation it can identify aberrations for expectations which may be due to faulty hardware, ill designed software or malicious attacks.

Biography of Axel JANTSCH: Axel Jantsch received the Dipl.Ing. and Dr. Tech. degrees from TU Wien, Vienna, Austria, in 1988 and 1992, respectively. He was with Siemens Austria, Vienna, Austria, as a system validation engineer from 1995 to 1997. From 1997to 2002 he was an associate professor and from 2002 to 2014 he was full professor of Electronic Systems Design at the Royal Institute of Technology (KTH), Stockholm, Sweden. Since 2014 he has been professor of Systems on Chip at TU Wien. He has published about 300 papers in international conferences and journals and one book in the areas of Systems on chip, networks on chip and embedded systems. He has served on a large number of technical program committees of international conferences, such as FDL, DATE, CODES ISSS, SOC, NOCS, and others. He has been the TPC Chair of SSDL/ FDL 2000, the TPC Co-Chair of CODES ISSS 2004, the General Chair of CODES ISSS 2005, and the TPC Co-Chair of NOCS 2009. From 2002 to 2007, he was a subject area editor for the Journal of System Architecture. He is on the editorial board for IEEE Design and Test and for the Leibniz Transactions on Embedded Systems. He is a member of the IEEE. His main research interest is on networks on chip and self-awareness in systems on chip and embedded systems.


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